What is a Makefile, and why use it?
Very brief: When compiling/linking any software project, using make and Makefiles makes life easier.
Why not compile from the command line? Or use a shell script to compile?
Compiling from the command line soon become tedious due to all the cc compiler flags:
cc -a -whole -lot -of -flags -and -arguments myprog.c -o myprog
make is smart enough to make you type less, even without a Makefile:
make myprog CFLAGS='-a -whole -lot -of -flags -and -arguments'
While a shell script is more suitable for generic usage, a Makefile is more powerful when it comes to passing environment variables, keeping compiled programs up to date, managing dependencies, etc. make can be seen as a "specialized software compilation shell scripting tool".
Create the following one-liner Makefile, and you can forget about the flags and arguments one for all:
CFLAGS=-a -whole -lot -of -flags -and -arguments
Lets say you have several source code files in the same directory: myprog.c, yourprog.c, herprog.c, hisprog.c
They may now be compiled with the same flags:
make myprog yourprog herprog hisprog
Try that with a shell script! (Not impossible, but more complicated.)
Note for gcc newbies:
The Makefile examples listed here all use C source code as input, which will be compiled with gcc.
Therefore it is recommended to read the relatively short but valuable text Compiling with cc if you aren't up to date with gcc and its most common flags.
Note for BSD users:
The Makefiles have been tested with GNU make. If you have any problem using them, perhaps you are using BSD make when you type make. On a BSD system, chances are you also have GNU make installed, where it is called gmake. Check out the make portable example for a Makefile valid both for BSD make and GNU make.
